veriloghdl语言设计点阵精编.docx
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Lele was written in 2021 Lele was written in 2021
VerilogHdl语言设计点阵精编
四川工程职业技术学院
Verilog Hdl 语言设计点阵
报告册
班级:2014通信技术1班
姓名:刘巧琳
指导老师:郭欣
时间:目录 TOC \o "1-3" \h \z \u
摘要
本论文主要阐述了基于FPGA设计16*16的点阵,让点阵静态或动态显示一个字或者一段话,LED显示屏如今在生活中应用广泛,各大广告商利用LED显示屏的便捷性宣传产品。这次实验需要利用EDA工具软件QuartusII编写并调试系统的Verilog HDL程序。并且每一个模块都在这个软件下进行了仿真。系统的Verilog HDL程序编好过后先在实验室的EDA实验箱上下载调试、验证。
关键词:LED、FPGA、Verilog HDL、点阵
Abstract
This paper mainly elaborated based on the FPGA design of 16 * 16 lattice, let lattice static or dynamic display a word or paragraph, LED display now in life are widely used, each big advertisers use LED display of the convenience of promotional products. This design needs to use the EDA tool software Verilog to write and debug the system's HDL QuartusII program. And each module is simulated